RISC-V is an open instruction set architecture allowing for processor innovation through open standard collaboration
By: Huang Tzu-ti, Taiwan News, Staff Writer
TAIPEI (Taiwan News) – Spearheaded by Powerchip Semiconductor Chairman Frank Huang (黃崇仁), RISC-V Taiwan was established March 7, paving the way for the next generation of computing design and innovation as the country ushers in an era of the artificial intelligence of things (AIoT).
Pronounced “risk-five,” RISC-V is defined as an open-source hardware instruction set architecture (ISA) employing established reduced instruction set computer (RISC) principles. The project started in 2010 at the University of California, Berkeley.
RISC-V ISA allows for free and extensible software and hardware freedom, which promises innovative applications in areas spanning consumer electronics, telecommunication, IoT, computing and data storage, industrial uses, and more, reported Liberty Times.
RISC-V based processors work faster while being energy-efficient, translating to commercial opportunities for Taiwan’s semiconductor industries which are gearing up for the introduction of 5G networks and integration of big data, AI, as well as IoT, noted Frank Huang. [FULL STORY]